1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device by using a gettering technique, and to a semiconductor device obtained by the manufacturing method. More particularly, the present invention relates to a method of manufacturing a semiconductor device using a crystalline semiconductor film formed by adding a metallic element that catalyzes crystallization of a semiconductor film, and to a semiconductor device obtained by the manufacturing method.
In this specification, xe2x80x9csemiconductor devicexe2x80x9d refers to all devices capable of functioning by using semiconductor characteristics, including all electro-optical devices, semiconductor circuits and electronic devices.
2. Description of the Related Art
Thin film transistors (hereinafter referred to as TFT) are known as a typical semiconductor device using a semiconductor film of a crystalline structure (hereinafter referred to as crystalline semiconductor film). TFT manufacturing techniques attract attention as techniques for forming an integrated circuit on an insulating substrate formed from glass or the like. Projects to put driver circuit-integrated liquid crystal display devices, etc., into practical use are being advanced. Crystalline semiconductor films are being formed by a process based on conventional techniques, i.e., a process in which an amorphous semiconductor film deposited by plasma chemical vapor deposition (plasma CVD) or low-pressure CVD is processed by heat treatment or laser annealing (a technique for crystallizing a semiconductor film by irradiation with laser light).
A crystalline semiconductor film formed in this manner is an aggregate of a multiplicity of crystal grains, and the crystal orientation thereof is random and cannot be controlled. This randomness is a factor which limits characteristics of TFTs. In view of this problem, techniques described below are taken into consideration. Japanese Patent Application Laid-open No. 7-183540 discloses a technique for making a crystalline semiconductor film by adding to a film material a metallic element such as nickel which catalyzes crystallization of a semiconductor film. This technique not only has the effect of reducing the heating temperature necessary for crystallization but also improves orientation of the crystal orientation in one direction. If a TFT is formed by using a crystalline semiconductor film formed by this technique, a reduction in subthreshold factor (S-value) is achieved as well as an improvement in field-effect mobility, thus remarkably improving electrical characteristics.
However, since this technique comprises adding a metallic element capable of catalytic action, it entails a problem in that such a metallic element remains in a crystalline semiconductor film or on the film surface and causes variations in characteristics of devices obtained from the film. For example, the off current in a TFT is increased and variation in off current occurs between the respective devices. That is, a metallic element which catalyzes crystallization becomes a hindrance rather than a necessary material once a crystalline semiconductor is formed.
Gettering using phosphorus is effectively used as a means for removing such a metallic element from a particular portion of a crystalline semiconductor film. For example, it is possible to easily remove such a metallic element from a channel region of a TFT in such a manner that phosphorus is added to a source-drain region of the TFT and heat treatment at 450 to 700xc2x0 C. is performed.
Phosphorus is implanted into a crystalline semiconductor film by ion doping (a method of implanting ions into a semiconductor by dissociating PH or the like in plasma and by accelerating ions by an electric field, i.e., a method which basically excludes mass separation of ions). The concentration of phosphorus necessary for gettering is 1xc3x971020/cm3 or higher. Addition of phosphorus by ion doping causes amorphization of the crystalline semiconductor film, and recrystallization of the semiconductor film is then performed by annealing. There is a problem of an impediment to the recrystallization due to an increased concentration of phosphorus. Also, addition of phosphorus at a high concentration leads to an increase in the processing time required for doping and, hence, a reduction in throughput of the doping step.
An object of the present invention is to provide, as a means for solving the above-described problems, a technique for effectively removing from a crystalline semiconductor film a metallic element remaining in the film, which has the effect of catalyzing crystallization of a semiconductor film, and which has been used to obtain the crystalline semiconductor film.
Gettering techniques are ranked as key techniques among techniques for manufacturing integrated circuits by using monocrystal silicon wafers. Gettering is known as a technique in which segregation of a metallic impurity taken into a semiconductor is caused at a gettering site by some energy to reduce the impurity concentration in an active region of a device. Gettering is broadly divided into two kinds: extrinsic gettering and intrinsic gettering. Extrinsic gettering produces a gettering effect by externally causing a strain field or chemical action. Phosphorus gettering by diffusing phosphorus through the back surface of a monocrystal silicon wafer so that the concentration of phosphorus is high falls within this category. Also, the above-mentioned gettering using phosphorus on a crystalline semiconductor film can be regarded as a kind of extrinsic gettering.
On the other hand, intrinsic gettering is known as a technique using a strain field of a lattice defect in a monocrystal silicon wafer which oxygen generated in the wafer concerns. The present invention has been achieved by focusing attention to such intrinsic gettering using a lattice defect or lattice strain. To apply such gettering to a crystalline semiconductor film having a thickness of about 10 to 100 nm, means described below are adopted.
The present invention comprises a process in which a rare gas element is added to a crystalline semiconductor thin film to form a gettering site, and a process for performing heat treatment on the semiconductor thin film. A metal contained in the crystalline semiconductor thin film is moved by the heat treatment to be captured at the gettering site (a region into which ions of the rare gas element have been added), thus removing or reducing the metal in the region of the crystalline semiconductor thin film other than the gettering site. The crystalline semiconductor thin film may be irradiated with strong light instead of undergoing ordinary heat treatment or may be simultaneously processed by ordinary heat treatment and irradiation with strong light.
The present invention is also characterized by placing a gettering site at a sufficient distance from a channel region in a TFT, considering the fact that a strong electric field is liable to concentrate in the vicinity of an end of a gate electrode, i.e., the boundary on the channel region when the TFT is driven.
As a method of adding a rare gas element, ion doping or ion implantation may be used. As a rare gas element used in accordance with the present invention, one of or two or more of He, Ne, Ar, Kr, and Xe may be selected. It is preferable to use Ar as a low-priced gas among these elements. If ion doping is performed, the concentration of one rare gas element contained in a doping gas is set to 30% or higher and, preferably, to 100%. For example, a doping gas having a Kr gas concentration of 30% and an Ar gas concentration of 70% may be used.
According to one aspect of the present invention disclosed in this specification, there is provided a semiconductor device comprising: an insulating film; an electrode; a channel region which overlaps the electrode with the insulating film interposed therebetween; a first impurity region which is adjacent to the channel region and which contains an impurity element imparting one conductivity type; and a second impurity region which is adjacent to the first impurity region, and which contains a metallic element, a rare gas element, and an impurity element imparting one conductivity type.
In the above-described structure, it is characterized in that the electrode is a gate electrode which partially overlaps the first impurity region with the insulating film interposed therebetween. An example thereof is illustrated in FIG. 1.
As another example of the above-described structure, FIG. 8 shows an example in which it is characterized in that the gate electrode covers the entire area of the first impurity region with the insulating film interposed therebetween. Specifically, in the example shown in FIG. 8, it is characterized in that the second impurity region is formed in a self-alignment manner.
Further, in each of the above-described structures, it is characterized in that the concentration of the impurity element imparting one conductivity type contained in the second impurity region is higher than the concentration of an impurity element imparting one conductivity type contained in the first impurity region.
Further, in each of the above-described structures, it is characterized in that the rare gas element is one element or a plurality of elements selected from the group consisting of He, Ne, Ar, Kr, and Xe.
Further, in each of the above-described structures, it is characterized in that the impurity element of the one conductivity type belongs to Group 15 or Group 13 in the periodic table.
To realize the above-described structure, according to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, including: a first step of adding a metallic element to a semiconductor film having an amorphous structure; a second step of crystallizing the semiconductor film to form a semiconductor film having a crystalline structure; a third step of forming an insulating film on the semiconductor film; a fourth step of forming an electrode on the insulating film so that the electrode overlaps the semiconductor film; a fifth step of selectively adding a rare gas element to the semiconductor film by using the electrode as a mask, and forming a second impurity region in the semiconductor film in a self-alignment manner by selectively adding an impurity element imparting one conductivity type; a sixth step of forming a gate electrode having a tapered portion by etching the electrode; a seventh step of forming a first impurity region by selectively adding the impurity element imparting one conductivity type to the semiconductor film through the tapered portion; and an eighth step of selectively removing or reducing the metallic element in the semiconductor film having the crystalline structure by gettering the metallic element into the second impurity region.
According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, including: a first step of adding a metallic element to a semiconductor film having an amorphous structure; a second step of crystallizing the semiconductor film to form a semiconductor film having a crystalline structure; a third step of forming a first impurity region in the semiconductor film having the crystalline structure by selectively adding an impurity element imparting one conductivity type to the semiconductor film; a fourth step of selectively adding a rare gas element to the semiconductor film having the crystalline structure, and forming a second impurity region in the semiconductor film by selectively adding the impurity element imparting one conductivity type to the semiconductor film; and a fifth step of selectively removing or reducing the metallic element in the semiconductor film having the crystalline structure by gettering the metallic element into the second impurity region.
In the above manufacturing method, the fourth step may comprise providing as a raw material gas a gas containing phosphine, and adding the phosphorus element and the rare gas element to the semiconductor film in the same step.
Further, in the above manufacturing method, the fourth step may comprise providing as a raw material gas a hydrogen gas containing phosphine, adding the phosphorus element to the semiconductor film, and then adding the rare gas element to the semiconductor film by using a rare gas as a raw material gas, without exposure to the atmosphere.
Also, one of or two or more of H, H2, O, and O2 may be selected to be added in addition to the rare gas element in the above-described step. In such a case, the step may be performed in an atmosphere containing the rare gas element and water vapor.
According to still another aspect of the present invention disclosed in this specification, there is provided a semiconductor device having, as illustrated in FIG. 18 by way of example, a pixel portion 1702 and a driver circuit 1701 provided on one insulating surface, wherein the driver circuit has n-channel TFTs 1706 and 1708, and p-channel TFTs 1705 and 1708, and a pixel TFT (n-channel TFT 1709) connected to a pixel electrode of the pixel portion has a semiconductor layer including a channel region 1687, a first impurity region (low-concentration impurity regions 1641 to 1644) adjacent to the channel region, and a second impurity region (high-concentration impurity regions 1655 to 1657) adjacent to the first impurity region.
In the above structure, it is characterized in that a gate electrode of the pixel TFT has a tapered portion, and the tapered portion overlaps with a part of the first impurity region. In addition, the second impurity region of the pixel TFT is formed by using a mask.
Further, in the above structure, a gate electrode of the n-channel TFT 1706 of the above-described driver circuit has a tapered portion, and the tapered portion overlaps with the entirety of the first impurity region. In addition, the second impurity region of the n-channel TFT 1706 of the above-described driver circuit is formed in a self-alignment manner.
Further, in each of the above-described structures, it is characterized in that the second impurity region contains a metallic element, a rare gas element, and an impurity element imparting one conductivity type.
Further, to realize the above-described arrangement, according to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a pixel portion and a driver circuit provided on one insulating surface, comprising:
a first step of adding a metallic element to a semiconductor film having an amorphous structure;
a second step of crystallizing the semiconductor film to form a semiconductor film having a crystalline structure;
a third step of forming an insulating film on the semiconductor film:
a fourth step of forming an electrode on the insulating film so that the electrode overlaps the semiconductor film and has a tapered portion;
a fifth step of forming a first impurity region by selectively adding an impurity element imparting one conductivity type to the semiconductor film through the tapered portion of the electrode;
a sixth step of selectively forming a second impurity region containing the impurity element imparting one conductivity type and a rare gas element in the semiconductor film in the pixel portion by providing a mask, and simultaneously forming a second impurity region in the driver circuit by using the electrode as a mask in a self-alignment manner; and
a seventh step of selectively removing or reducing the metallic element in the semiconductor film having the crystalline structure by gettering the metallic element into the second impurity region.
Further, to realize the above-described arrangement, according to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device having, as illustrated in FIG. 16 and FIG. 17 by way of example, a pixel portion and a driver circuit provided on one insulating surface, comprising:
a first step of adding a metallic element to a semiconductor film having an amorphous structure;
a second step of crystallizing the semiconductor film to form a semiconductor film having a crystalline structure;
a third step of forming an insulating film 1697 on the semiconductor film;
a fourth step of forming electrodes 1622 to 1627 on the insulating film each overlapping the semiconductor film and having a tapered portion;
a fifth step of forming a first impurity region 1628 in the semiconductor film by selectively adding an impurity element imparting one conductivity type to the semiconductor film by using the electrode as a mask:
a sixth step of selectively forming second impurity regions 1655 to 1657 containing the impurity element imparting one conductivity type and a rare gas element in the pixel portion by forming a mask 1632, and simultaneously forming second impurity regions 1649 and 1650 in the driver circuit by using the above-described electrode 1623 as a mask in a self-alignment manner, and forming third impurity regions 1635 and 1636 between the second impurity regions 1649 and 1650 and the channel region 1684 in the driver circuit by causing the impurity to pass through the tapered portion of the above-described electrode; and
a seventh step of selectively removing or reducing the metallic element in the semiconductor film having the crystalline structure by gettering the metallic element in the second impurity regions 1647 to 1658.
In the above-described structure, the impurity concentration in the third impurity region is lower than that in the second impurity region and has a concentration gradient along the channel length direction according to the tapered shape of the tapered portion of the electrode, because the third impurity region is formed by adding the impurity through the tapered portion of the electrode. In the sixth step of the above-described structure, the impurity element imparting one conductivity type and the rare gas element may be added successively or may be added at a time in the same step. If they are successively added, and if the conditions for addition are such that the rare gas element does not pass through the tapered portion when added, the rare gas element is not added to the third impurity region and can be added only to the second impurity region.
In this specification, a low-concentration impurity region (nxe2x88x92xe2x88x92 region) is referred to as a first impurity region, a low-concentration impurity region (nxe2x88x92 region) is referred to as a third impurity region, and a high-concentration impurity region (n+region) is referred to as a second impurity region.